Product Overview

High Performance IP

Silicon Creations supplies high performance IP from a broad portfolio of wide-range PLLs, High-Speed IOs and SerDes that is silicon proven and in mass production in many wafer fabs and in process nodes ranging from 5nm to 180nm. These highly-programmable products, together with a solid development flow and industry-leading support has led to a growing list of repeat customers who voice their satisfaction with us.

Our comprehensive design and verification flow backed by detailed models calibrated to silicon results assures you that any customizations we make to our IP for our customers are low risk. We use our test lab, equipped with measurement equipment automated with Matlab to generate comprehensive reports on the functionality of new IP.

Our IP product portfolio includes:

  • A variety of versatile ring PLLs programmable for very-low power and for low jitter, suitable for battery operated devices and applications including system clocking, precision AFE and ADC timing, SerDes reference clocks and DDR interfaces.
  • Fully integrated LC PLLs with ultra low jitter approaching that of single chip products.
  • Analog glue functions such as differential buffers and multiplexers for low jitter clock distribution, Power on Reset (POR) and Bandgap Circuits
  • Free running oscillators with low power and excellent precision over PVT.
  • SerDes analog layers (PMAs) with speeds from 100Mbps to 25Gbps.
  • Bi-directional LVDS interfaces and video display interfaces.

In addition to this wide portfolio of proven IP, Silicon Creations is happy to discuss your custom timing or interface application and can develop a semi-custom solution for you based on silicon proven blocks. By combining creative and novel design techniques with proven circuit architectures and verification methodologies, we deliver leading performance with low risk while maintaining highly competitive pricing and delivery times.

Please review the list of our products on Design & Reuse and ChipEstimate

Silicon Creations and Automotive
Read the paper

Summary of the paper on SemiWiki >

Silicon Creations and Automotive
Things we learned developing IP for 5nm FinFET
Video presentation
Silicon Creations

Learn about a recent SerDes PMA development

We have developed an extremely low power 6Gbps to 25Gbps SerDes receiver in TSMC 28 HPC. Silicon in in our lab uses only 1.8pJ/bit (1.8mW/Gbps/lane) when the 5-tap DFE is enabled for channels with 25dB loss and 1.3pJ/bit for 18dB channels requiring only CTLE.

Read the presentation given at IPSoC Santa Clara