PLLs

General purpose synthesizers and special purpose PLLs

Silicon Creations provides a wide range of ring oscillator based PLLs for general purpose clocking and purpose built for specific applications. Our ring PLLs share a common analog core architecture which is in very large volume production in well over 500 customer chips from 180nm CMOS to 5nm FinFET providing a low risk path to generating most SoC clocks. Our PLLs include:

  • Fractional-N PLLs which are multi-functional, general purpose frequency synthesizers. A rich set of features are combined with low power, low area, best-in-class jitter performance and widely flexible programming making these PLLs suitable for a wide range of applications from general purpose and spread spectrum core clocking to clocking of ADC/AFE circuits and generation of PCIe3 reference clocks. A 24-bit delta-sigma modulator allows the output frequency to be adjusted in steps smaller than 0.01ppm. In many processes we complement our general purpose Fractional-N PLL with a low-jitter Fractional-N PLL capable of generating a PCIe5 compliant reference clock from a Xtal reference. Download a product overview.
  • Fully integrated IoT PLLs for ultra-low power applications using microwatts of power when operating using a 32.768kHz (RTC) reference clock and with extremely fast start/stop times for low system energy consumption.
  • Deskew PLLs for DDR interfaces and Zero-delay buffer applications.
  • Extremely low area ring PLLs running from core voltage only optimized for clocking digital circuits.
  • Multi-phase PLLs providing 12, 16 or even 32 outputs with accurately spaced phase suitable for phase alignment in source-synchronous data interfaces like DDR2, DDR3 and DDR4.
  • High-speed, performance optimized integer PLLs with integrated jitter as low as 1ps RMS and suitable for clocking precision data converters and SerDes, yet using a fraction of the die area needed for an LC-PLL.
  • Fully integrated Jitter Attenuator (Jitter Cleaner) PLLs optimized for Clock De-spreading, PON, OTU and Synchronous Ethernet applications with bandwidth programmable to below 1Hz.

Please review the list of our products on Design & Reuse and ChipEstimate

Excellent Simulation Correlation

Jitter simulation modes are calibrated against silicon and accurately predict phase noise reducing risk when targeting optimal PPA

Excellent Simulation-Silicon Correlation

Jitter compensation DAC in or Fractional-N PLL significant;y reduces Fractional spurs and enables this PLL to replace cascades of integer PLLs with lower power and lower area. Almost any Xtal can be used.

Typical Fractional-N PLL

Typical Fractional-N Ring PLL block diagram showing very wide range. Separate power domains allow multiple PLLs to share supplies.

Multiphase PLL

Multi-phase (DDR) Ring PLL

Exact spread spectrum modulation

Spread spectrum modulation with exactly the shape and modulation frequency you program

Jitter Cleaner

Fully integrated Jitter Cleaner PLLs

Contact us to discuss your PLL needs

Whether you'd like to use one of our mass-production PLLs, or have one customized for your specific needs, we're keen to help. Please reach out to us via our sales reps, or using the form on our contacts page.

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