Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), was awarded the 2017 TSMC Open Innovation Platform® (OIP) Partner of the Year Award for Analog/Mixed Signal IP at the recent TSMC OIP Ecosystem Forum in Santa Clara, Calif.
Silicon Creations has collaborated with TSMC on multiple process nodes since 2006. The company recently announced the ability to support all variants of TSMC’s 28nm metal gate processes with a single layout of the Silicon Creations general-purpose fractional phase-locked loop IP (PLLTS28HPMFRAC). This has led to many benefits for customers including lowered risk, raised yield and shorter time to market. As of September 2017, Silicon Creations PLL and SerDes IP has been used on over 230 mass production tape-outs with over 1.65 million wafers shipped in 10nm to 40nm. Along with its PLL success at TSMC, Silicon Creations recently completed testing (silicon proven) of a multi-protocol SerDes PMA in TSMC40LP with bit-rates of 0.5-12.7Gbps, and over 25 protocols supported.
“We are honored to receive this award in recognition of the quality and support of our PLL and SerDes IP,” said Jeff Galloway, CEO, Silicon Creations. “It is our pleasure to partner with TSMC on multiple process nodes. Together we are helping our mutual customers successfully design and deliver the next generation of electronic products.”
Silicon Creations is a leading silicon IP developer with offices in the US and Poland. The company is focused on providing world-class silicon intellectual property (IP) for precision and general-purpose timing (PLLs), low power, high-performance SerDes and high-speed differential I/Os. Silicon Creations' IP is proven from 7 to 180-nanometer process technologiesBack to Top